1. Field of the Invention
This invention relates to a low cost flip chip ball grid array (FCBGA) and, in particular, a low cost flip chip package with enhanced thermal performance.
2. Description of Related Art
As computer buses grow to 64 and 128 bits wide to support increased system performance, lead count requirements increase even more dramatically. New devices for networking and computer applications are approaching lead counts in the 750-1100 range, at frequency of 200-MHz and higher. Flip chip interconnection technology, which spreads the pins or bumps over the entire surface of the chip, instead of conventional arrangements on the edges of the chip only, is the most cost effective solution for these new, high density lead count requirements. In addition to increasing the number of connections to a chip, flip chip interconnection technology also enables power and ground contacts to be placed in optimal locations for maximum electrical performance.
In flip chip interconnection technology, the primary heat dissipation path is off the back or opposed side to the active side of the flipped chip. A heat sink, with (capped) or without (capless) a heat spreader or cap has been used to facilitate heat removal from the opposed side of the chip. Alternatively, the back or opposed side of the chip can be manufactured exposed allowing thermal transfer through a later applied customer heat sink to the opposed side of the chip. Examples, of flip chip encapsulation using capless and capped approaches are proposed in a publication entitled "Ball Grid Array Technology " by John H. Lau, pages 137 -138. U.S. Pat. Nos. 5,399,898; 5,410,805: 5,637,920; and 5,700,723, assigned to the assignee of the present invention and incorporated herein by reference for all purposes, also disclose flip chips. U.S. Pat. No. 5,638,920 discloses a ball grid array for a flip chip.
Also, U.S. Pat. Nos. 5,514,327; 5,527,743; and 5,552,634 disclose a heat sink and U.S. Pat. Nos. 5,463,529 and 5,568,683 disclose both a heat sink and a heat spreader. These patents are also assigned to the assignee of the present invention and incorporated herein by reference for all purposes.
Amkor Electronics of Santa Clara, Calif. has fabricated chips attached, in some cases by an epoxy, to a substrate with the chip active electrcial circuitry side facing upward (away from the top of the substrate). Wire bonds are then attached between the circuitry on the active side of the chip and the substrate to electrically connect the chip and substrate. A material or compound that resists electrcial conductivity but, preferably, is thermally conductive, completely covers the wire bonds to electrically isolate the wire bonds.
LSI Logic Corporation of Milpitas, Calif., the assignee of the present invention, has constructed a flip chip package, such as shown in FIG. 1. In the flip chip package, a substrate 10 is a top 10A and a bottom 10B. The organic material for substrate 10 is preferably fabricated from a bismaleimide triazine (BT) resin supplied by Mitsubishi Gas Chemical and Allied Signal. However, other substrates fabricated from aluminum-nitride (AIN); silicon-carbide (SiC), glass-ceramic silicon (Si), glass epoxy, and polymide have been used. A silicon ship 12 has an active side 12A with electrical circuitry and an opposed side 12B. The active side 12A of the chip 12 is electrically connected or bonded to the top surface 10A of substrate 10 by reflowed solder bumps 14, preferably fabricated with a composition of 63% tin and 37% lead (63 Sn -37 Pb). These solder bumps 14, provide the electrical connection of the chip 12 to the substrate 10. However, solderless bumps have been proposed, such as disclosed in the paper entitiled "Fabrication and Assembly Processes for Solderless Flip Chip Assemblies" by Richard H. Estes of Epoxy Technology, ISHM '92 Proceedings (pages 322-335). As discussed below in detail, an underfill 16 is applied using capillary action after bump connection of the chip 12 to the substrate 10 is completed. Like the material or compound used to cover the wire bonds discussed above, this underfill 16 resists electrical conductivity but, preferably is thermally conductive.
A prior art stiffener 18, such as disclosed in the Background of the Invention section of U.S. patent application Ser. No. 08/994,391 filed on Dec. 19, 1997, entitled "Flip Chip Stiffener with Circular Notches in Inner Opening and Predispensed Adhesive" has been used. This U.S. application is also assigned to the assignee of the present invention and is incorporated herein by reference. Generally, the prior art stiffener 18 has an inner window or opening formed by four sides, each inner side having a distance of 22.00 millimeters .+-.0.10 millimeter, a distance from the squared outer edges of 4.00 millimeters .+-.0.10 millimeters and a thickness of 0.5 millimeter .+-.0.05 millimeter.
In particular, the underfill 16 comprises an epoxy that is dispensed during assembly and allowed to cure. After the underfill 16 has cured, if a heat spreader is used, such as the heat spreader 20, an additional epoxy, such as an electrically/thermally conductive paste 22, Product No. 8361H, sold under a trademark "ABLEBOND" by Ablestick Electronic Materials & Adhesives of Rancho Dominguez, Calif., a subsidiary of National Starch and Chemical Company is used. The conductive paste 22 is applied between both the opposed side 12B of the chip 12 and the stiffener 18, and the heat spreader 20 during the assembly and allowed to cure. A thermal grease has also been used between the opposed side 12B of the chip 12 and the heat spreader 20 instead of paste 22. A heat sink, not shown, can be attached to the heat spreader of FIG. 1 with a conductive adhesive. An array of balls, such as balls 24, as shown in FIG. 1, are then attached to the bottom 10B of the substrate 10.
The heat spreader 20 and the stiffener 18 are preferably fabricated from a nickel plated copper. Since the chip 12 is attached to the heat spreader 20 using the thermal paste 22, the thermal conduction path travels from the chip 12 back or opposed side 12B through the thermal paste 22, the heat spreader 20, a stiffener attach material 18B, such as the thermal paste 22, and the stiffener 18. As can now be understood, dispensing and curing of the epoxy 18A, 18B for attaching the stiffener 18 to both the heat spreader 20 and substrate 10, and the dispensing and curing of the epoxy 22 for attaching the silicon chip 12 to the heat spreader 20 results in additional material and processing cost. Also, maintaining the gap between the chip 12 and the heat spreader 20 for consistent thermal conduction is a concern. Also, the copper heat spreader 20 and the nickel plated copper stiffener 18 account for significant amount of weight and cost in the package of FIG. 1.
Turning to FIG. 2, another package, presently being used in the industry, does not include a stiffener, such as stiffener 18, or a heat spreader, such as heat spreader 20, as shown in FIG. 1. While this package would be lower in cost than the flip chip package shown in FIG. 1, the main thermal path for heat dissipation is through the bumps 14 on the downwardly facing active side 12A of the chip 12. Also, the opposed side 12B of the chip 12 of FIG. 2 may have a relatively thin protective coating on the opposed side 12B.
As is known, the chip 12 and its interconnection to the substrate 10, as shown in both FIGS. 1 and 2, by the bumps 14 must be protected by encapsulation using an underfill 16 resistive to electrical conductivity. In the past a filled epoxy resin underfill 16 has been used to seal between the chip 12 and the substrate 10 immediately after bonding. The sealing resin is then usually cured at 150.degree. C. As discussed above, the encapsulate underfill 16 flow occurs by capillary action under the chip 12 and is complete when fillets form along all four sides of the chip 12, as partially shown by the fillet F in FIGS. 1 and 2. Preferably, a silica filed epoxy resin encapsulate underfill 16 is dispensed around the bumps 14. A silicon-carbon liquid encapsulate introduced by Hercules, Incorporated of Wilmington, Delaware has been found to have excellent moisture resistance, ionic purity, low dielectric constant and good thermal properties, as proposed in the publication entitled "Flip Chip Technology--A Review" by Chien-Yi Huang and K. Srihari, Phd., November 1994. Generally, the underfill 16 volume required is a function of the chip size, number of bumps, size of fillet around the perimeter of the chip and the stand-off height between the chip 12 and the substrate 10. Typically, less than 0.1 gram of underfill 16 is sufficient. A gel step for the underfill 16 is often performed for ease of handling before an oven cure to prevent further moisture absorption.
As mentioned above, U.S. Pat. No. 5,700,723, previously incorporated herein by reference, proposes a method of packaging an integrated circuit, preferably a flip chip. In one embodiment, a form is used in molding a single compound for both the underfill and to cover the chip and a portion of the top of the substrate, as depicted in FIGS. 4 and 7 of the '723 patent. The compound is preferably a heat conductive material, such as an epoxy, and because a single compound is used, the compound must resist electrical conductivity to isolate the bumps and their contacts. ('723 patent, col. 3, Ins 31-45).
U.S. Pat. No. 5,572,069, which is assigned to the assignee of the present invention and is incorporated herein by reference for all purposes, proposes screen printing a conductive epoxy onto a printed wire board (PWB).